These Schottky-clamped TTL MSI circuits are designed to be used in high-performance memory decoding or data-routing applications requiring very propagation delay times. In high-performance memory systems, these docoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit,the delay times of the memory are usually less than the typical access time of the memory.This means that the effective system delay introduced by the Schottky-clamped system delay introduced by the Schottky-clamped system decoder is negligible.
The XL/XDLS138 decode one of eight lines dependent on the conditions at the three binary select inputs and the three binary select inputs reduce the need for external gates or inverters when expending.A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter.An enable input can be used as a data input for demultiplexing applications.
All of these decoder/demultiplexers feature fully buffered inputs,each of which represents only one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and to simplify system design.
The XL74LS138,XD74LS138 are characterized for operation from 0℃ to 70℃.
