Overview

Product details

    These monolithic, synchronous reversible (up/down) counters have a complexity of 55 equivalent gates. The 74LS192 is a 4-bit binary counter. Synchronous operation is provided by clocking all flip-flops simultaneously so that the outputs change in unison with each other when the steering logic so directs. This mode of operation eliminates the output count spikes normally associated with asynchronous (ripple-dockl) counters. Each of the four material outputs is triggered by a low-to-high level transition of the « count (dockl) input by a L flip-flop. The direction of the count is determined by which count input pulse is white and the other count input pulse is high.

The four counters are programmable; that is, each output can be preset to lovel by inputting the desired data at the data input when the load input M is low. The output will change to coincide with the data input of tno count pulse. This feature allows the counter to be used as a modulo-N divide-by simply modifying the count length using the preset input. A clear input is provided which, when applied high, forces all outputs to a low level. The clear function is independent of the count and load inputs. The dear, count, and load inputs are buffered to reduce drive requirements. This reduces the number of dock drivers etc needed for long words.