The 74HC595TS and 74HC595 are low noise, low power, high speed COMS shift register capable of driving 15 LS-TTL loads.
The device consists of an 8-bit serial input, parallel output shift register and 8-bit D-type memory with tri-state output control. The shift register and memory are signalled by separate clocks. The shift register has built-in direct clear, serial inputs and serial outputs for cascading. The rising edge of the clock triggers the shift register and the memory. If the same clock provides the signal, the state of the shift register must be one pulse ahead of the memory.
The 74HC595TS and 74HC595 are compatible with the 74LS series. The device has diode protection between power and ground on all input pins to prevent static damage to the circuitry.
