Overview

Product details

The XL4021B-27 is an 8-stage parallel or serial input/serial output chip with common CLOCK and parallel/SERIALCONTROL inputs, a single serial data input, and separate parallel "JAM" inputs for each register stage. Each register stage is a D-type master-slave flip-flop. In addition to the output of stage 8, a "Q" output is also available from stages 6 and 7. In the XL4021B-27, the serial term is synchronous with the clock, while the parallel term is asynchronous. In both types, the inputs are controlled by the PARALLEL/SERIAL CONTROL inputs. When the PARALLEL/SERIAL control input is low, data is serially transferred into the 8-stage register synchronously with the positive transition of the clock line. When the parallel/serial control input is high, data is jammed into the 8-stage register via the parallel input lines, synchronously with the positive transition of the clock line. In the XL4021B-27, the CLOCK input of the internal stage is "forced" when asynchronous parallel input is made. This allows the use of multiple package extension registers.