Overview

Product details

    This synchronous 4-bit binary counter with internal carry look-ahead function can be used in high-speed counting designs. Synchronous operation is achieved by clocking all flip-flops simultaneously so that the outputs change in unison with each other when commanded by the count enable input and internal strobe. This mode is to eliminate output count spikes, commonly associated with asynchronous (ripple clock) counters. The buffered clock input triggers the four flip-flops on the rising (positive going) edge of the clock input waveform. This counter is fully programmable; that is, the outputs can be preset to either level. Since the preset is synchronous, setting a low level at the load input disables the counter and causes the output to coincide with the set data after the next clock pulse, regardless of the level of the enable input. If the enable input is high at or before the transition, a low-to-high transition at the load input should be avoided when the clock is low. The clear function is asynchronous, and a low level at the clear input sets all four flip-flop outputs low, regardless of the levels of the clock, load, or enable inputs. The carry look-ahead circuit provides cascaded counters for n-bit synchronous applications without the need for additional fetches. The tools to implement this function are two count enable inputs and a ripple carry output. Both count enable inputs (P and T) must be high for counting to occur, and input T is fed forward to enable the ripple carry output. The ripple carry output thus enabled will produce a high level output pulse with a duration approximately equal to the high level portion of the Q-a output. This high level overflow ripple carry pulse can be used to implement a continuous cascade stage. The high to low level transition of the enable P or T input will only occur when the clock input is high.