XD4060
CMOS 14-Stage Ripple-Carry Binary Counter/Divider and Oscillator
Delay circuit
Control counter
Timer
Frequency divider
The XD4060 consists of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows the design of RC or crystal oscillator circuits. A reset input is provided to reset the counter to the all-O state and disable the oscillator. A high level on the reset line completes the reset function. All counter stages are master-slave flip-flops. The state of the counter advances one step ∅Ⅰ (and ∅0) in binary sequence on negative transitions. All inputs and outputs are fully buffered. Schmitt triggers, operating on the input pulse line, allow infinite input pulse rise and fall times.
● 12 MHz clock frequency at 15 V
● Common reset
● Fully static operation
● Buffered inputs and outputs
● Schmitt trigger input pulse lines
● 100% tested quiescent current at 20 V
● Normalized, symmetrical output characteristics x5-V,10-V, and 15-V parameter ratings
Product | Package | Operating temperature | QTY. | ROHS | Apply for samples |
---|---|---|---|---|---|
XD4060 | DIP-16 | -40℃~+85℃ | 1000 pcs/Tube | ✔ | Sample application |